1. Field of the Invention
The present invention relates to the operation of a disk formatter implemented in a disk drive controller. More particularly, the present invention relates to an apparatus and method for providing for efficient communication between high and low level processing engines in a disk drive formatter having a highly flexible architecture capable of handling different formatting schemes.
2. Description of Related Art
Conventional disk drives employ disk formatters having a fixed architecture capable of handling a single formatting scheme. By way of example, the formatting scheme may rely upon the use of a header associated with each sector of user data residing on the tracks of a magnetic disk to uniquely identify the sector. However, using headers takes up space on the magnetic disk which could otherwise be employed for storing user data. Accordingly, a number of alternate formatting schemes that do not rely upon headers have been implemented in commercial disk drives. Yet, the disk formatters that use these alternative formatting schemes, rather than being designed to accommodate a number of different formatting schemes, are instead "hard-wired" for a single formatting scheme, which reduces the flexibility of the disk formatter.
Accordingly, even where a disk formatter might uses a writeable control store (WCS) to provide some programming capability that implements a particular formatting scheme, the writeable control store often relies on such a small amount of memory and is so primitive that a system processor (e.g., digital signal processor (DSP) or microcontroller) must be employed to constantly update the writeable control store with commands and monitor the status of the writeable control store. In addition, when a writeable control store is used for disk formatting, the DSP must dedicate resources which could otherwise be employed for non-formatting related tasks.
One disadvantage inherent in conventional prior art disk formatters is that they cannot be readily adapted to contend with rapid changes in disk drive technology which are geared towards increasing the number of tracks or bits per inch stored on the magnetic disk. Moreover, the proliferation of vendor specific diagnostic tools used in disk formatters requires greater flexibility on the part of those disk formatters to accommodate different diagnostic techniques.
In order to contend with different disk formatting schemes, a flexible disk formatter architecture has been developed which is the subject of a U.S. patent application entitled, "Programmable High Performance Disk Formatter for Headerless Disk Controller," which is being filed on Mar. 31, 1998, contemporaneously with the present application by Keats et al., and assigned to the same assignee.
The inventive disk formatter described in the above-mentioned application requires the use of two processing engines to facilitate disk operations. One of the two processing engines, referred to below as a high level processing engine, executes user-defined code based on a set of instructions created for a disk formatter application. The use of a high level processing engine reduces the processing power required by the DSP to implement a particular formatting scheme.
These sequencing instructions are executed by the other processing engine, referred to below as a low level processing engine, to directly control disk operation. By way of example, the low level processing engine may execute sequencing instructions which control the reading and writing of data to a disk, as well as the formatting of a disk.
One of the problems which arises with the use of two separate processing engines is that they must coordinate the flow of data between themselves. This relationship is further complicated when the engines operate using different clocks, which is the case with the inventive disk formatter disclosed in the above-mentioned application. In particular, the high level processing engine operates using a much faster clock which is geared towards processing millions of instructions per second (MIPS), while the low level processing engine operates on a slower clock which is a function of the disk transfer rate of the associated disk drive.
One possible approach for coordinating the flow of data between the high and low processing engines would be to rely on conventional hand-shaking techniques to synchronize their activities. However, such an approach could be rather complex to implement and might have to account for the fact that the low level processing engine, which must keep pace with a rotating disk, cannot sacrifice the time required to send status reports back to the high level processing engine. Accordingly, in light of the foregoing, a simple communication scheme is called for that accounts for the different clocks within the high and low level processing engines and for the fact that the low-level processing engine must keep pace with a rotating disk.